Worldwide data transfer continues to grow at an explosive rate. Three dimensional (3D) flash memory devices, comprising a plurality of layers or multilayer stacks, such as without limitation 24, 32, 48, 96, 128 or greater layers, allow more data transfer in a smaller footprint. Newer 3D memory devices such as vertical-NAND (VNAND) memory devices have at least twice the write speed, greater than 10 times the endurance, and approximately half the power consumption compared to conventional NAND memory devices, comprise a plurality of layers such as, without limitation 24, 32, 48, or 96 layers or greater. To deposit these multilayer stacks, the end user typically employs alternative deposition of silicon oxide and silicon nitride films. For certain applications, the silicon nitride films are sacrificial layers wherein the layers are removed in one or more subsequent processing steps.
Generally, silicon oxide films have a compressive stress ranging from about −300 to about −100 MegaPascals (MPa). To balance out the compressive stress of the silicon oxide layer and avoid structure cracking or collapsing after depositing multiple layers such as 24, 32 48, 96, or 128 layers, the silicon nitride films should have a tensile stress ranging from about +50 to about +300 MPa. For most silicon-containing precursors, raising the stress of the film typically compromises the film quality. In certain applications, such as those for making NAND and 3D VNAND devices which subject the structure to an epitaxial silicon deposition step which is conducted at temperatures greater than 700° C., the silicon nitride film should also have minimal shrinkage and less than 300 MPa stress change.
US Publ. No. 2014/0284808 describes the use of the precursor tetraethoxysilane (TEOS) for silicon oxide deposition and dichlorosilane for nitride deposition using a chemical vapor deposition (CVD) method at 650˜750° C. or higher.
US Publ. No. US 2008/0260969 and U.S. Pat. No. 8,357,430 both describe methods for high quality plasma enhanced chemical vapor deposition (PECVD) of silicon nitride using the precursor trisilylamine (TSA).
US Publ. No. 2014/0213065 or U.S. Pat. No. 9,018,093 describes a method to deposit stacked layers comprising a first layer and a second layer wherein each stacked layer has the same thickness.
US Publ. No. 2014/0213067 describes a method for SiOCN film deposition or SiCN/SiCO stacks by atomic layer deposition.
There have also been intensive studies on stress controls for SiH4 based silicon nitride films. Some of the topics that these studies addressed are the following: higher NH3:SiH4 ratio, lower plasma power, higher pressure, and higher temperature to affect resultant tensile stress.
Therefore, there is a need in the art for a 3D memory device or apparatus and method for making same comprising at least one silicon oxide layer and at least one silicon nitride layer that provides one or more of the following advantages: the use of a single silicon-containing precursor to deposit both types of layers; the at least one silicon nitride films having a tensile stress ranging from about 50 to about +300 (MPa) to avoid stress accumulation of the overall multilayer stack; good electrical properties meaning that it retains its insulating nature after processing; excellent thermal stability meaning there is minimal film shrinkage and stress change; higher deposition rate than other precursors such as silane under same conditions to improve throughput and film properties; wet etch selectivity so that the sacrificial nitride layer can be easily removed; improved electrical performance; long term stability; and combinations thereof. To simplify the manufacturing process and improve the throughput, it would be advantageous to deposit high quality silicon oxide and silicon nitride films using a single silicon-containing precursor for both layers.